core¶
-
class AudioControl(*, parameters: Sequence[Parameter], calculation_rate: CalculationRate, special_index: int =
0
)¶ Bases:
Control
-
class BinaryOpUGen(*, calculation_rate: CalculationRate, left: SupportsFloat | UGenScalar, right: SupportsFloat | UGenScalar, special_index: SupportsInt =
0
)¶ Bases:
UGen
- property left : UGenScalar¶
- property operator : BinaryOperator¶
- property right : UGenScalar¶
- class Check(*values)¶
Bases:
Enum
A UGen input rate check configuration.
-
NONE =
0
¶
-
SAME_AS_FIRST =
1
¶
-
SAME_OR_SLOWER =
2
¶
-
NONE =
- class ConstantProxy(value: SupportsFloat)¶
Bases:
UGenScalar
A floating point constant proxy.
Wraps a float and exposes all UGenOperable methods against it.
-
class Control(*, parameters: Sequence[Parameter], calculation_rate: CalculationRate, special_index: int =
0
)¶ Bases:
UGen
-
class LagControl(*, parameters: Sequence[Parameter], calculation_rate: CalculationRate, special_index: int =
0
)¶ Bases:
Control
- class OutputProxy(ugen: UGen, index: int)¶
Bases:
UGenScalar
A UGen output proxy.
Encodes a reference to a specific output of a UGen, as a scalar.
- property calculation_rate : CalculationRate¶
-
class Param(default: Default | Missing | float | None =
None
, check: Check =Check.NONE
, unexpanded: bool =False
)¶ Bases:
NamedTuple
A UGen input configuration.
-
class Parameter(*, name: str | None =
None
, value: float | Sequence[float], rate: ParameterRate =ParameterRate.CONTROL
, lag: float | None =None
)¶ Bases:
UGen
-
class SynthDef(ugens: Sequence[UGen], name: str | None =
None
)¶ Bases:
object
- __graph__() Graph ¶
Graph a SynthDef.
>>> from supriya.ugens import Out, SinOsc, SynthDefBuilder >>> with SynthDefBuilder(amplitude=1.0, bus=0, frequency=[440, 443]) as builder: ... source = SinOsc.ar(frequency=builder["frequency"]) ... out = Out.ar(bus=builder["bus"], source=source * builder["amplitude"]) ...
>>> synthdef = builder.build()
>>> graph = synthdef.__graph__() >>> print(format(graph, "graphviz")) digraph synthdef_4e5d18af62c02b10252a62def13fb402 { graph [bgcolor=transparent, color=lightslategrey, dpi=72, fontname=Arial, outputorder=edgesfirst, overlap=prism, penwidth=2, rankdir=LR, ranksep=1, splines=spline, style="dotted, rounded"]; node [fontname=Arial, fontsize=12, penwidth=2, shape=Mrecord, style="filled, rounded"]; edge [penwidth=2]; ugen_0 [fillcolor=lightgoldenrod2, label="<f_0> Control\n(control) | { { <f_1_0_0> amplitude:\n1.0 | <f_1_0_1> bus:\n0.0 | <f_1_0_2> frequency[0]:\n440.0 | <f_1_0_3> frequency[1]:\n443.0 } }"]; ugen_1 [fillcolor=lightsteelblue2, label="<f_0> SinOsc\n(audio) | { { <f_1_0_0> frequency | <f_1_0_1> phase:\n0.0 } | { <f_1_1_0> 0 } }"]; ugen_2 [fillcolor=lightsteelblue2, label="<f_0> BinaryOpUGen\n[MULTIPLICATION]\n(audio) | { { <f_1_0_0> left | <f_1_0_1> right } | { <f_1_1_0> 0 } }"]; ugen_3 [fillcolor=lightsteelblue2, label="<f_0> SinOsc\n(audio) | { { <f_1_0_0> frequency | <f_1_0_1> phase:\n0.0 } | { <f_1_1_0> 0 } }"]; ugen_4 [fillcolor=lightsteelblue2, label="<f_0> BinaryOpUGen\n[MULTIPLICATION]\n(audio) | { { <f_1_0_0> left | <f_1_0_1> right } | { <f_1_1_0> 0 } }"]; ugen_5 [fillcolor=lightsteelblue2, label="<f_0> Out\n(audio) | { { <f_1_0_0> bus | <f_1_0_1> source[0] | <f_1_0_2> source[1] } }"]; ugen_0:f_1_0_0:e -> ugen_2:f_1_0_1:w [color=goldenrod]; ugen_0:f_1_0_0:e -> ugen_4:f_1_0_1:w [color=goldenrod]; ugen_0:f_1_0_1:e -> ugen_5:f_1_0_0:w [color=goldenrod]; ugen_0:f_1_0_2:e -> ugen_1:f_1_0_0:w [color=goldenrod]; ugen_0:f_1_0_3:e -> ugen_3:f_1_0_0:w [color=goldenrod]; ugen_1:f_1_1_0:e -> ugen_2:f_1_0_0:w [color=steelblue]; ugen_2:f_1_1_0:e -> ugen_5:f_1_0_1:w [color=steelblue]; ugen_3:f_1_1_0:e -> ugen_4:f_1_0_0:w [color=steelblue]; ugen_4:f_1_1_0:e -> ugen_5:f_1_0_2:w [color=steelblue]; }
-
compile(use_anonymous_name: bool =
False
) bytes ¶
- class SynthDefBuilder(**kwargs: Parameter | Sequence[float] | float)¶
Bases:
object
- class SortBundle(ugen, width_first_antecedents, antecedents, descendants)¶
- __enter__() SynthDefBuilder ¶
-
add_parameter(*, name: str, value: float | Sequence[float], rate: ParameterRate | SupportsInt | str | None =
ParameterRate.CONTROL
, lag: float | None =None
) Parameter ¶
-
build(name: str | None =
None
, optimize: bool =True
) SynthDef ¶ Build.
>>> from supriya.ugens import Out, SinOsc, SynthDefBuilder >>> with SynthDefBuilder(amplitude=1.0, bus=0, frequency=[440, 443]) as builder: ... source = SinOsc.ar(frequency=builder["frequency"]) ... source *= builder["amplitude"] ... _ = Out.ar(bus=builder["bus"], source=source) ...
>>> synthdef = builder.build() >>> print(synthdef) synthdef: name: 4e5d18af62c02b10252a62def13fb402 ugens: - Control.kr: amplitude: 1.0 bus: 0.0 frequency[0]: 440.0 frequency[1]: 443.0 - SinOsc.ar/0: frequency: Control.kr[2:frequency[0]] phase: 0.0 - BinaryOpUGen(MULTIPLICATION).ar/0: left: SinOsc.ar/0[0] right: Control.kr[0:amplitude] - SinOsc.ar/1: frequency: Control.kr[3:frequency[1]] phase: 0.0 - BinaryOpUGen(MULTIPLICATION).ar/1: left: SinOsc.ar/1[0] right: Control.kr[0:amplitude] - Out.ar: bus: Control.kr[1:bus] source[0]: BinaryOpUGen(MULTIPLICATION).ar/0[0] source[1]: BinaryOpUGen(MULTIPLICATION).ar/1[0]
-
class TrigControl(*, parameters: Sequence[Parameter], calculation_rate: CalculationRate, special_index: int =
0
)¶ Bases:
Control
-
class UGen(*, calculation_rate: CalculationRate =
CalculationRate.SCALAR
, special_index: SupportsInt =0
, **kwargs: SupportsFloat | UGenScalar | UGenSerializable | Sequence[SupportsFloat | UGenScalar])¶ Bases:
UGenOperable
,Sequence
A UGen: a “unit generator”.
- __getitem__(i: int) OutputProxy ¶
- __getitem__(i: slice) UGenVector
- __iter__() Iterator[UGenOperable] ¶
- property calculation_rate : CalculationRate¶
- property inputs : tuple[OutputProxy | float, ...]¶
- property signal_range : SignalRange¶
- class UGenOperable¶
Bases:
object
Mixin for UGen arithmetic operations.
- __abs__() UGenOperable ¶
Compute absolute value of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = abs(ugen_graph) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(ABSOLUTE_VALUE).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(ABSOLUTE_VALUE).ar/1: source: SinOsc.ar/1[0]
- __add__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Add
expr
to UGen graph.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph + expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(ADDITION).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(ADDITION).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
Supports short-circuiting:
>>> result = ugen_graph + 0 >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - SinOsc.ar/1: frequency: 443.0 phase: 0.0
- __and__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute bitwise AND of UGen graph and
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph & expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(BITWISE_AND).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(BITWISE_AND).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- __ceil__() UGenOperable ¶
Calculate ceiling of ugen graph.
>>> import math >>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = math.ceil(ugen_graph) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(CEILING).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(CEILING).ar/1: source: SinOsc.ar/1[0]
- __floor__() UGenOperable ¶
Calculate floor of ugen graph.
>>> import math >>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = math.floor(ugen_graph) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(FLOOR).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(FLOOR).ar/1: source: SinOsc.ar/1[0]
- __floordiv__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute integer division of UGen graph by
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph // expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(INTEGER_DIVISION).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(INTEGER_DIVISION).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- __ge__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Test if UGen graph is greater than or equal to
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph >= expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(GREATER_THAN_OR_EQUAL).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(GREATER_THAN_OR_EQUAL).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- __gt__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Test if UGen graph is greater than
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph > expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(GREATER_THAN).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(GREATER_THAN).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- __invert__() UGenOperable ¶
Compute bitwise inversion of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ~ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(BIT_NOT).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(BIT_NOT).ar/1: source: SinOsc.ar/1[0]
- __iter__() Iterator[UGenOperable] ¶
- __le__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Test if UGen graph is less than or equal to
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph <= expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(LESS_THAN_OR_EQUAL).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(LESS_THAN_OR_EQUAL).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- __lshift__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Bitshift UGen graph to the left by
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph << expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(SHIFT_LEFT).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(SHIFT_LEFT).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- __lt__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Test if UGen graph is less than
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph < expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(LESS_THAN).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(LESS_THAN).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- __mod__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute modulo of UGen graph and
expr
:>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph % expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(MODULO).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(MODULO).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- __mul__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Multiply UGen graph and
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph * expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(MULTIPLICATION).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(MULTIPLICATION).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
Supports short-circuiting:
>>> ugen_graph * 0 <UGenVector([<0.0>, <0.0>])>
>>> result = ugen_graph * 1 >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - SinOsc.ar/1: frequency: 443.0 phase: 0.0
>>> result = ugen_graph * -1 >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(NEGATIVE).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(NEGATIVE).ar/1: source: SinOsc.ar/1[0]
- __neg__() UGenOperable ¶
Compute negative of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = -ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(NEGATIVE).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(NEGATIVE).ar/1: source: SinOsc.ar/1[0]
- __or__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute bitwise OR of UGen graph and
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph | expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(BITWISE_OR).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(BITWISE_OR).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- __pow__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Raise UGen graph to the power of
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph**expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(POWER).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(POWER).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- __radd__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Add UGen graph to
expr
(reflected).>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = [1, 2, 3] >>> result = expr + ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - BinaryOpUGen(ADDITION).ar/0: left: 1.0 right: SinOsc.ar/0[0] - BinaryOpUGen(ADDITION).ar/1: left: 3.0 right: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(ADDITION).ar/2: left: 2.0 right: SinOsc.ar/1[0]
- __rand__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute reflected bitwise AND of
expr
and UGen graph (reflected).>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = [1, 2, 3] >>> result = expr & ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - BinaryOpUGen(BITWISE_AND).ar/0: left: 1.0 right: SinOsc.ar/0[0] - BinaryOpUGen(BITWISE_AND).ar/1: left: 3.0 right: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(BITWISE_AND).ar/2: left: 2.0 right: SinOsc.ar/1[0]
- __rfloordiv__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute integer division of
expr
by UGen graph (reflected).>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = [1, 2, 3] >>> result = expr // ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - BinaryOpUGen(INTEGER_DIVISION).ar/0: left: 1.0 right: SinOsc.ar/0[0] - BinaryOpUGen(INTEGER_DIVISION).ar/1: left: 3.0 right: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(INTEGER_DIVISION).ar/2: left: 2.0 right: SinOsc.ar/1[0]
- __rlshift__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Bitshift
expr
to the left by UGen graph (reflected).>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = [1, 2, 3] >>> result = expr << ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - BinaryOpUGen(SHIFT_LEFT).ar/0: left: 1.0 right: SinOsc.ar/0[0] - BinaryOpUGen(SHIFT_LEFT).ar/1: left: 3.0 right: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(SHIFT_LEFT).ar/2: left: 2.0 right: SinOsc.ar/1[0]
- __rmod__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute reflected modulo of
expr
and UGen graph (reflected).>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = [1, 2, 3] >>> result = expr % ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - BinaryOpUGen(MODULO).ar/0: left: 1.0 right: SinOsc.ar/0[0] - BinaryOpUGen(MODULO).ar/1: left: 3.0 right: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(MODULO).ar/2: left: 2.0 right: SinOsc.ar/1[0]
- __rmul__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Multiple
expr
by UGen graph (reflected).>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = [1, 2, 3] >>> result = expr - ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - BinaryOpUGen(SUBTRACTION).ar/0: left: 1.0 right: SinOsc.ar/0[0] - BinaryOpUGen(SUBTRACTION).ar/1: left: 3.0 right: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(SUBTRACTION).ar/2: left: 2.0 right: SinOsc.ar/1[0]
Supports short-circuiting:
>>> result = 0 - ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(NEGATIVE).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(NEGATIVE).ar/1: source: SinOsc.ar/1[0]
- __ror__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute bitwise OR of
expr
and UGen graph (reflected).>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = [1, 2, 3] >>> result = expr | ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - BinaryOpUGen(BITWISE_OR).ar/0: left: 1.0 right: SinOsc.ar/0[0] - BinaryOpUGen(BITWISE_OR).ar/1: left: 3.0 right: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(BITWISE_OR).ar/2: left: 2.0 right: SinOsc.ar/1[0]
- __rpow__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Raise
expr
to the power of UGen graph (reflected).>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = [1, 2, 3] >>> result = expr**ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - BinaryOpUGen(POWER).ar/0: left: 1.0 right: SinOsc.ar/0[0] - BinaryOpUGen(POWER).ar/1: left: 3.0 right: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(POWER).ar/2: left: 2.0 right: SinOsc.ar/1[0]
- __rrshift__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Bitshift
expr
to the right by UGen graph (reflected).>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = [1, 2, 3] >>> result = expr >> ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - BinaryOpUGen(SHIFT_RIGHT).ar/0: left: 1.0 right: SinOsc.ar/0[0] - BinaryOpUGen(SHIFT_RIGHT).ar/1: left: 3.0 right: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(SHIFT_RIGHT).ar/2: left: 2.0 right: SinOsc.ar/1[0]
- __rshift__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Bitshift UGen graph to the right by
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph >> expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(SHIFT_RIGHT).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(SHIFT_RIGHT).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- __rsub__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Subtract UGen graph from
expr
(reflected).>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = [1, 2, 3] >>> result = expr - ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - BinaryOpUGen(SUBTRACTION).ar/0: left: 1.0 right: SinOsc.ar/0[0] - BinaryOpUGen(SUBTRACTION).ar/1: left: 3.0 right: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(SUBTRACTION).ar/2: left: 2.0 right: SinOsc.ar/1[0]
Supports short-circuiting:
>>> result = 0 - ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(NEGATIVE).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(NEGATIVE).ar/1: source: SinOsc.ar/1[0]
- __rtruediv__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute true division of
expr
by UGen graph (reflected).>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = [1, 2, 3] >>> result = expr / ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - BinaryOpUGen(FLOAT_DIVISION).ar/0: left: 1.0 right: SinOsc.ar/0[0] - BinaryOpUGen(FLOAT_DIVISION).ar/1: left: 3.0 right: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(FLOAT_DIVISION).ar/2: left: 2.0 right: SinOsc.ar/1[0]
- __rxor__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute bitwise XOR of
expr
and UGen graph (reflected).>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = [1, 2, 3] >>> result = expr ^ ugen_graph >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - BinaryOpUGen(BITWISE_XOR).ar/0: left: 1.0 right: SinOsc.ar/0[0] - BinaryOpUGen(BITWISE_XOR).ar/1: left: 3.0 right: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(BITWISE_XOR).ar/2: left: 2.0 right: SinOsc.ar/1[0]
- __sub__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Subtract
expr
from UGen graph.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph - expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(SUBTRACTION).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(SUBTRACTION).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
Supports short-circuiting:
>>> result = ugen_graph - 0 >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - SinOsc.ar/1: frequency: 443.0 phase: 0.0
- __synthdef__() SynthDef ¶
Generate a SynthDef from UGen graph.
Typically used for rendering debug information about the UGen graph, or for generating Graphviz graphs.
- __truediv__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute true division of UGen graph by
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph / expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(FLOAT_DIVISION).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(FLOAT_DIVISION).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
Supports short-circuiting:
>>> result = ugen_graph / 1 >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - SinOsc.ar/1: frequency: 443.0 phase: 0.0
- __xor__(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute bitwise XOR of UGen graph and
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph ^ expr >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(BITWISE_XOR).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(BITWISE_XOR).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- absdiff(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute absolute difference between UGen graph and
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.absdiff(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(ABSOLUTE_DIFFERENCE).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(ABSOLUTE_DIFFERENCE).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- acos() UGenOperable ¶
Compute the arccosine of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.acos() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(ARCCOS).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(ARCCOS).ar/1: source: SinOsc.ar/1[0]
- am_clip(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute two quadrant multiplication between UGen graph and
expr
.0 when b <= 0
a * b when b > 0
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.am_clip(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(AMCLIP).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(AMCLIP).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- amplitude_to_db() UGenOperable ¶
Convert UGen graph from amplitude to decibels.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.amplitude_to_db() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(AMPLITUDE_TO_DB).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(AMPLITUDE_TO_DB).ar/1: source: SinOsc.ar/1[0]
- asin() UGenOperable ¶
Compute the arcsine of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.asin() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(ARCSIN).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(ARCSIN).ar/1: source: SinOsc.ar/1[0]
- atan() UGenOperable ¶
Compute the arctangent of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.atan() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(ARCTAN).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(ARCTAN).ar/1: source: SinOsc.ar/1[0]
- atan2(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute the arctangen of UGen graph divided by
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.atan2(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(ATAN2).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(ATAN2).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- bi_lin_rand() UGenOperable ¶
Compute a bilateral linearly distributed random number from - UGen graph to + UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.bi_lin_rand() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(BILINRAND).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(BILINRAND).ar/1: source: SinOsc.ar/1[0]
- bi_rand() UGenOperable ¶
Compute a random number between - UGen graph and + UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.bi_rand() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(RAND2).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(RAND2).ar/1: source: SinOsc.ar/1[0]
- clip(minimum: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput], maximum: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Clip UGen graph between
maximum
andminimum
.>>> from supriya.ugens import LFNoise1, SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.clip( ... maximum=LFNoise1.kr(), ... minimum=LFNoise1.kr(), ... ) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - LFNoise1.kr/0: frequency: 500.0 - LFNoise1.kr/1: frequency: 500.0 - Clip.ar/0: source: SinOsc.ar/0[0] minimum: LFNoise1.kr/0[0] maximum: LFNoise1.kr/1[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - Clip.ar/1: source: SinOsc.ar/1[0] minimum: LFNoise1.kr/0[0] maximum: LFNoise1.kr/1[0]
- clip2(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute bilateral clipping of UGen graph by
expr
.clip a to +/- b
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.clip2(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(CLIP2).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(CLIP2).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- cos() UGenOperable ¶
Compute cosine of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.cos() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(COS).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(COS).ar/1: source: SinOsc.ar/1[0]
- cosh() UGenOperable ¶
Compute the hyperbolic cosine of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.cosh() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(COSH).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(COSH).ar/1: source: SinOsc.ar/1[0]
- cubed() UGenOperable ¶
Compute the cube of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.cubed() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(CUBED).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(CUBED).ar/1: source: SinOsc.ar/1[0]
- db_to_amplitude() UGenOperable ¶
Convert UGen graph from decibels to amplitude.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.db_to_amplitude() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(DB_TO_AMPLITUDE).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(DB_TO_AMPLITUDE).ar/1: source: SinOsc.ar/1[0]
- difference_of_squares(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute the difference of squares of UGen graph and
expr
.(a * a) - (b * b)
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.difference_of_squares(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(DIFFERENCE_OF_SQUARES).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(DIFFERENCE_OF_SQUARES).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- digit_value() UGenOperable ¶
Compute the digit value of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.digit_value() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(AS_INT).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(AS_INT).ar/1: source: SinOsc.ar/1[0]
- distort() UGenOperable ¶
Compute non-linear distortion of UGen graph.
x / (1 + abs(x))
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.softclip() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(SOFTCLIP).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(SOFTCLIP).ar/1: source: SinOsc.ar/1[0]
- exceeds(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Threshold UGen graph by
expr
.0 when a < b, otherwise a
Equivalent to sclang’s
threshold
method, but renamed due to name conflicts with many UGen parameters.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.exceeds(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(THRESHOLD).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(THRESHOLD).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- excess(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute the residual of clipping UGen graph by
expr
a - clip2(a,b))
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.excess(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(EXCESS).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(EXCESS).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- exponential() UGenOperable ¶
Compute the exponential of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.exponential() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(EXPONENTIAL).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(EXPONENTIAL).ar/1: source: SinOsc.ar/1[0]
- exponential_rand_range(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute an exponentially-distributed random number in the interval of UGen graph to
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.exponential_rand_range(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(EXPRANDRANGE).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(EXPRANDRANGE).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- fill(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
- fold2(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute bilateral folding of UGen graph by
expr
.fold a to +/- b
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.fold2(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(FOLD2).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(FOLD2).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- fractional_part() UGenOperable ¶
Compute the fractional part of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.fractional_part() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(FRACTIONAL_PART).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(FRACTIONAL_PART).ar/1: source: SinOsc.ar/1[0]
- gcd(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute the greatest common divisor of UGen graph and
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.gcd(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(GREATEST_COMMON_DIVISOR).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(GREATEST_COMMON_DIVISOR).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- hanning_window() UGenOperable ¶
Compute Hanning window from UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.hanning_window() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(HANNING_WINDOW).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(HANNING_WINDOW).ar/1: source: SinOsc.ar/1[0]
- hypot(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute the hypotenuse of UGen graph and
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.hypot(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(HYPOT).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(HYPOT).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- hypotx(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute the hypotenuse approximation of UGen graph and
expr
.abs(x) + abs(y) - ((sqrt(2) - 1) * min(abs(x), abs(y)))
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.hypotx(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(HYPOTX).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(HYPOTX).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- hz_to_midi() UGenOperable ¶
Convert UGen graph from Hertz to MIDI note number.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.hz_to_midi() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(HZ_TO_MIDI).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(HZ_TO_MIDI).ar/1: source: SinOsc.ar/1[0]
- hz_to_octave() UGenOperable ¶
Convert UGen graph from Hertz to octave number.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.hz_to_octave() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(HZ_TO_OCTAVE).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(HZ_TO_OCTAVE).ar/1: source: SinOsc.ar/1[0]
- is_equal_to(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute equality of UGen graph and
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.is_equal_to(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(EQUAL).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(EQUAL).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- is_not_equal_to(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute inequality of UGen graph and
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.is_not_equal_to(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(NOT_EQUAL).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(NOT_EQUAL).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
-
lagged(lag_time_up: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput] =
0.5
, lag_time_down: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput] | None =None
, factor: 1 | 2 | 3 =1
) UGenOperable ¶ Lag UGen graph.
If
lag_time_down
is non-null, use an “up/down” variant.If
factor
is 2 or 3, use the Lag2 or Lag3 variant.>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.lagged(0.25) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - Lag.ar/0: source: SinOsc.ar/0[0] lag_time: 0.25 - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - Lag.ar/1: source: SinOsc.ar/1[0] lag_time: 0.25
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.lagged(lag_time_up=0.25, lag_time_down=1.5, factor=3) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - Lag3UD.ar/0: source: SinOsc.ar/0[0] lag_time_up: 0.25 lag_time_down: 1.5 - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - Lag3UD.ar/1: source: SinOsc.ar/1[0] lag_time_up: 0.25 lag_time_down: 1.5
- lcm(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute the least common multiple of UGen graph and
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.lcm(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(LEAST_COMMON_MULTIPLE).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(LEAST_COMMON_MULTIPLE).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- lin_rand() UGenOperable ¶
Compute a linearly-distributed random number between 0 and UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.lin_rand() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(LINRAND).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(LINRAND).ar/1: source: SinOsc.ar/1[0]
- log() UGenOperable ¶
Compute the logarithm of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.log() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(LOG).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(LOG).ar/1: source: SinOsc.ar/1[0]
- log10() UGenOperable ¶
Compute the base 10 logarithm of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.log10() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(LOG10).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(LOG10).ar/1: source: SinOsc.ar/1[0]
- log2() UGenOperable ¶
Compute the base 2 logarithm of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.log2() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(LOG2).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(LOG2).ar/1: source: SinOsc.ar/1[0]
- max(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute the maximum of UGen graph and
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.max(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(MAXIMUM).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(MAXIMUM).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- midi_to_hz() UGenOperable ¶
Convert UGen graph from MIDI note number to Hertz.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.midi_to_hz() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(MIDI_TO_HZ).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(MIDI_TO_HZ).ar/1: source: SinOsc.ar/1[0]
- min(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute the minimum of UGen graph and
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.min(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(MINIMUM).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(MINIMUM).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- octave_to_hz() UGenOperable ¶
Convert UGen graph from octave number to Hertz.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.octave_to_hz() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(OCTAVE_TO_HZ).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(OCTAVE_TO_HZ).ar/1: source: SinOsc.ar/1[0]
- rand() UGenOperable ¶
Compute a random number between 0 and UGen graph, exclusive.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.rand() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(RAND).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(RAND).ar/1: source: SinOsc.ar/1[0]
- rand_range(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute a random number in the interval of UGen graph to
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.rand_range(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(RANDRANGE).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(RANDRANGE).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- ratio_to_semitones() UGenOperable ¶
Converts UGen graph from frequency ratio to semitone distance.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.ratio_to_semitones() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(RATIO_TO_SEMITONES).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(RATIO_TO_SEMITONES).ar/1: source: SinOsc.ar/1[0]
- reciprocal() UGenOperable ¶
Compute the reciprocal of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.reciprocal() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(RECIPROCAL).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(RECIPROCAL).ar/1: source: SinOsc.ar/1[0]
- rectangle_window() UGenOperable ¶
Compute rectangle window from UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.rectangle_window() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(RECTANGLE_WINDOW).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(RECTANGLE_WINDOW).ar/1: source: SinOsc.ar/1[0]
- ring1(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute ring modulation of UGen graph and
expr
plus UGen graph.(a * b) + a
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.ring1(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(RING1).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(RING1).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- ring2(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute ring modulation of UGen graph and
expr
plus both sources.(a * b) + a + b
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.ring2(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(RING2).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(RING2).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- ring3(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute ring modulation of UGen graph and
expr
multiplied by UGen graph.a * b * a
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.ring3(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(RING3).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(RING3).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- ring4(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute ring modulation variant of UGen graph and
expr
.(a * a * b) - (a * b * b)
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.ring4(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(RING4).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(RING4).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- round(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Round UGen graph by
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.round(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(ROUND).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(ROUND).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- round_up(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Round UGen graph _up_ by
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.round_up(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(ROUND_UP).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(ROUND_UP).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- s_curve() UGenOperable ¶
Compute the S-curve of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.s_curve() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(S_CURVE).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(S_CURVE).ar/1: source: SinOsc.ar/1[0]
-
scale(input_minimum: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput], input_maximum: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput], output_minimum: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput], output_maximum: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput], exponential: bool =
False
) UGenOperable ¶ Scale UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.scale(-1.0, 1.0, 0.5, 0.75) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - MulAdd.ar/0: source: SinOsc.ar/0[0] multiplier: 0.125 addend: 0.625 - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - MulAdd.ar/1: source: SinOsc.ar/1[0] multiplier: 0.125 addend: 0.625
- scale_negative(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Scale negative portion of UGen graph by
expr
.a * b when a < 0
otherwise a
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.scale_negative(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(SCALE_NEG).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(SCALE_NEG).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- semitones_to_ratio() UGenOperable ¶
Converts UGen graph from semitone distance to frequency ratio.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.semitones_to_ratio() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(SEMITONES_TO_RATIO).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(SEMITONES_TO_RATIO).ar/1: source: SinOsc.ar/1[0]
- sign() UGenOperable ¶
Compute the sign of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.sign() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(SIGN).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(SIGN).ar/1: source: SinOsc.ar/1[0]
- silence() UGenOperable ¶
Silence (zero-out) UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.silence() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(SILENCE).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(SILENCE).ar/1: source: SinOsc.ar/1[0]
- sin() UGenOperable ¶
Compute the sine of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.sin() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(SIN).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(SIN).ar/1: source: SinOsc.ar/1[0]
- sinh() UGenOperable ¶
Compute the hyperbolic sine of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.sinh() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(SINH).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(SINH).ar/1: source: SinOsc.ar/1[0]
- softclip() UGenOperable ¶
Compute non-linear distortion of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.softclip() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(SOFTCLIP).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(SOFTCLIP).ar/1: source: SinOsc.ar/1[0]
- sqrt() UGenOperable ¶
Compute the square root of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.sqrt() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(SQUARE_ROOT).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(SQUARE_ROOT).ar/1: source: SinOsc.ar/1[0]
- square_of_difference(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute the square of difference between UGen graph and
expr
.(a - b) ** 2
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.square_of_difference(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(SQUARE_OF_DIFFERENCE).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(SQUARE_OF_DIFFERENCE).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- square_of_sum(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute square of sum of UGen graph and
expr
.(a + b) ** 2
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.square_of_sum(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(SQUARE_OF_SUM).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(SQUARE_OF_SUM).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- squared() UGenOperable ¶
Compute the square of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.squared() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(SQUARED).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(SQUARED).ar/1: source: SinOsc.ar/1[0]
- sum3_rand() UGenOperable ¶
Compute a random number in the interval of - UGen graph to + UGen graph, calculated by averaging three such numbers.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.sum3_rand() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(SUM3RAND).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(SUM3RAND).ar/1: source: SinOsc.ar/1[0]
- sum_of_squares(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute sum of squares of UGen graph and
expr
.(a * a) + (b * b)
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.sum_of_squares(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(SUM_OF_SQUARES).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(SUM_OF_SQUARES).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- tan() UGenOperable ¶
Compute the tangent of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.tan() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(TAN).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(TAN).ar/1: source: SinOsc.ar/1[0]
- tanh() UGenOperable ¶
Compute the hyperbolic tangent of UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.tanh() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(TANH).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(TANH).ar/1: source: SinOsc.ar/1[0]
- through() UGenOperable ¶
Pass through UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.through() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(THRU).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(THRU).ar/1: source: SinOsc.ar/1[0]
- transpose(semitones: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute transposition of UGen graph by
expr
in semitones.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.transpose(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(HZ_TO_MIDI).ar/0: source: SinOsc.ar/0[0] - WhiteNoise.kr: null - BinaryOpUGen(ADDITION).ar/0: left: UnaryOpUGen(HZ_TO_MIDI).ar/0[0] right: WhiteNoise.kr[0] - UnaryOpUGen(MIDI_TO_HZ).ar/0: source: BinaryOpUGen(ADDITION).ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(HZ_TO_MIDI).ar/1: source: SinOsc.ar/1[0] - BinaryOpUGen(ADDITION).ar/1: left: UnaryOpUGen(HZ_TO_MIDI).ar/1[0] right: WhiteNoise.kr[0] - UnaryOpUGen(MIDI_TO_HZ).ar/1: source: BinaryOpUGen(ADDITION).ar/1[0]
- triangle_window() UGenOperable ¶
Compute triangle window from UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.triangle_window() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(TRIANGLE_WINDOW).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(TRIANGLE_WINDOW).ar/1: source: SinOsc.ar/1[0]
- truncate(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Truncate UGen graph by
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.truncate(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(TRUNCATION).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(TRUNCATION).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- unsigned_shift(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute unsigned right shift of UGen graph by
expr
.>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.unsigned_shift(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(UNSIGNED_SHIFT).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(UNSIGNED_SHIFT).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- welch_window() UGenOperable ¶
Compute Welch window from UGen graph.
>>> from supriya.ugens import SinOsc >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> result = ugen_graph.welch_window() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - UnaryOpUGen(WELCH_WINDOW).ar/0: source: SinOsc.ar/0[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - UnaryOpUGen(WELCH_WINDOW).ar/1: source: SinOsc.ar/1[0]
- wrap2(expr: SupportsFloat | UGenOperable | UGenSerializable | Sequence[UGenRecursiveInput]) UGenOperable ¶
Compute bilateral wrapping of UGen graph by
expr
.wrap a to +/- b
>>> from supriya.ugens import SinOsc, WhiteNoise >>> ugen_graph = SinOsc.ar(frequency=[440, 443]) >>> expr = WhiteNoise.kr() >>> result = ugen_graph.wrap2(expr) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - WhiteNoise.kr: null - BinaryOpUGen(WRAP2).ar/0: left: SinOsc.ar/0[0] right: WhiteNoise.kr[0] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - BinaryOpUGen(WRAP2).ar/1: left: SinOsc.ar/1[0] right: WhiteNoise.kr[0]
- class UGenScalar¶
Bases:
UGenOperable
A UGen scalar.
- __iter__() Iterator[UGenOperable] ¶
- class UGenSerializable(*args, **kwargs)¶
Bases:
Protocol
Protocol for classes serializable as UGenVectors.
- serialize(**kwargs) UGenVector ¶
- class UGenVector(*values: SupportsFloat | UGenOperable)¶
Bases:
UGenOperable
,Sequence
[UGenOperable
]A sequence of UGenOperables.
- __getitem__(i: int) UGenOperable ¶
- __getitem__(i: slice) UGenVector
- __iter__() Iterator[UGenOperable] ¶
- flatten() UGenOperable ¶
Flatten UGen vector.
>>> from supriya.ugens import Pan2, SinOsc >>> vector = Pan2.ar(source=Pan2.ar(source=SinOsc.ar(frequency=[440, 443]))) >>> supriya.graph(vector)
>>> print(repr(vector)) <UGenVector([<UGenVector([<Pan2.ar()>, <Pan2.ar()>])>, <UGenVector([<Pan2.ar()>, <Pan2.ar()>])>])>
>>> result = vector.flatten() >>> print(repr(result)) <UGenVector([<Pan2.ar()[0]>, <Pan2.ar()[1]>, <Pan2.ar()[0]>, <Pan2.ar()[1]>, <Pan2.ar()[0]>, <Pan2.ar()[1]>, <Pan2.ar()[0]>, <Pan2.ar()[1]>])>
-
mix(channel_count: int =
1
) UGenOperable ¶ Mix UGen vector down to
channel_count
outputs.>>> from supriya.ugens import Pan2, SinOsc >>> vector = Pan2.ar(source=Pan2.ar(source=SinOsc.ar(frequency=[440, 443]))) >>> supriya.graph(vector)
>>> print(vector) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - Pan2.ar/0: source: SinOsc.ar/0[0] position: 0.0 level: 1.0 - Pan2.ar/1: source: Pan2.ar/0[0] position: 0.0 level: 1.0 - Pan2.ar/2: source: Pan2.ar/0[1] position: 0.0 level: 1.0 - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - Pan2.ar/3: source: SinOsc.ar/1[0] position: 0.0 level: 1.0 - Pan2.ar/4: source: Pan2.ar/3[0] position: 0.0 level: 1.0 - Pan2.ar/5: source: Pan2.ar/3[1] position: 0.0 level: 1.0
>>> result = vector.mix(2) >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - Pan2.ar/0: source: SinOsc.ar/0[0] position: 0.0 level: 1.0 - Pan2.ar/1: source: Pan2.ar/0[0] position: 0.0 level: 1.0 - Pan2.ar/2: source: Pan2.ar/0[1] position: 0.0 level: 1.0 - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - Pan2.ar/3: source: SinOsc.ar/1[0] position: 0.0 level: 1.0 - Pan2.ar/4: source: Pan2.ar/3[0] position: 0.0 level: 1.0 - Pan2.ar/5: source: Pan2.ar/3[1] position: 0.0 level: 1.0 - Sum4.ar/0: input_one: Pan2.ar/1[0] input_two: Pan2.ar/2[0] input_three: Pan2.ar/4[0] input_four: Pan2.ar/5[0] - Sum4.ar/1: input_one: Pan2.ar/1[1] input_two: Pan2.ar/2[1] input_three: Pan2.ar/4[1] input_four: Pan2.ar/5[1]
- sum() UGenOperable ¶
Sum UGen vector down to a single output.
>>> from supriya.ugens import Pan2, SinOsc >>> vector = Pan2.ar(source=Pan2.ar(source=SinOsc.ar(frequency=[440, 443]))) >>> supriya.graph(vector)
>>> print(vector) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - Pan2.ar/0: source: SinOsc.ar/0[0] position: 0.0 level: 1.0 - Pan2.ar/1: source: Pan2.ar/0[0] position: 0.0 level: 1.0 - Pan2.ar/2: source: Pan2.ar/0[1] position: 0.0 level: 1.0 - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - Pan2.ar/3: source: SinOsc.ar/1[0] position: 0.0 level: 1.0 - Pan2.ar/4: source: Pan2.ar/3[0] position: 0.0 level: 1.0 - Pan2.ar/5: source: Pan2.ar/3[1] position: 0.0 level: 1.0
>>> result = vector.sum() >>> supriya.graph(result)
>>> print(result) synthdef: name: ... ugens: - SinOsc.ar/0: frequency: 440.0 phase: 0.0 - Pan2.ar/0: source: SinOsc.ar/0[0] position: 0.0 level: 1.0 - Pan2.ar/1: source: Pan2.ar/0[0] position: 0.0 level: 1.0 - Pan2.ar/2: source: Pan2.ar/0[1] position: 0.0 level: 1.0 - Sum4.ar/0: input_one: Pan2.ar/1[0] input_two: Pan2.ar/1[1] input_three: Pan2.ar/2[0] input_four: Pan2.ar/2[1] - SinOsc.ar/1: frequency: 443.0 phase: 0.0 - Pan2.ar/3: source: SinOsc.ar/1[0] position: 0.0 level: 1.0 - Pan2.ar/4: source: Pan2.ar/3[0] position: 0.0 level: 1.0 - Pan2.ar/5: source: Pan2.ar/3[1] position: 0.0 level: 1.0 - Sum4.ar/1: input_one: Pan2.ar/4[0] input_two: Pan2.ar/4[1] input_three: Pan2.ar/5[0] input_four: Pan2.ar/5[1] - BinaryOpUGen(ADDITION).ar: left: Sum4.ar/0[0] right: Sum4.ar/1[0]
-
class UnaryOpUGen(*, calculation_rate: CalculationRate, source: SupportsFloat | UGenScalar, special_index: SupportsInt =
0
)¶ Bases:
UGen
- property operator : UnaryOperator¶
- property source : UGenScalar¶
- exception SynthDefError¶
-
compile_synthdefs(synthdef: SynthDef, *synthdefs: SynthDef, use_anonymous_names: bool =
False
) bytes ¶
- param(default: ~supriya.typing.Default | ~supriya.typing.Missing | float | None = <supriya.typing.Missing object>, *, check: ~supriya.ugens.core.Check = Check.NONE, unexpanded: bool = False) Param ¶
Define a UGen parameter.
Akin to dataclasses.field.
- synthdef(*args: str | tuple[str, float]) Callable[[Callable], SynthDef] ¶
Decorator for quickly constructing SynthDefs from functions.
>>> from supriya import Envelope, synthdef >>> from supriya.ugens import EnvGen, Out, SinOsc
>>> @synthdef() ... def sine(freq=440, amp=0.1, gate=1): ... sig = SinOsc.ar(frequency=freq) * amp ... env = EnvGen.kr(envelope=Envelope.adsr(), gate=gate, done_action=2) ... Out.ar(bus=0, source=[sig * env] * 2) ...
>>> print(sine) synthdef: name: sine ugens: - Control.kr: amp: 0.1 freq: 440.0 gate: 1.0 - SinOsc.ar: frequency: Control.kr[1:freq] phase: 0.0 - BinaryOpUGen(MULTIPLICATION).ar/0: left: SinOsc.ar[0] right: Control.kr[0:amp] - EnvGen.kr: gate: Control.kr[2:gate] level_scale: 1.0 level_bias: 0.0 time_scale: 1.0 done_action: 2.0 envelope[0]: 0.0 envelope[1]: 3.0 envelope[2]: 2.0 envelope[3]: -99.0 envelope[4]: 1.0 envelope[5]: 0.01 envelope[6]: 5.0 envelope[7]: -4.0 envelope[8]: 0.5 envelope[9]: 0.3 envelope[10]: 5.0 envelope[11]: -4.0 envelope[12]: 0.0 envelope[13]: 1.0 envelope[14]: 5.0 envelope[15]: -4.0 - BinaryOpUGen(MULTIPLICATION).ar/1: left: BinaryOpUGen(MULTIPLICATION).ar/0[0] right: EnvGen.kr[0] - Out.ar: bus: 0.0 source[0]: BinaryOpUGen(MULTIPLICATION).ar/1[0] source[1]: BinaryOpUGen(MULTIPLICATION).ar/1[0]
>>> @synthdef("ar", ("kr", 0.5)) ... def sine(freq=440, amp=0.1, gate=1): ... sig = SinOsc.ar(frequency=freq) * amp ... env = EnvGen.kr(envelope=Envelope.adsr(), gate=gate, done_action=2) ... Out.ar(bus=0, source=[sig * env] * 2) ...
>>> print(sine) synthdef: name: sine ugens: - AudioControl.ar: freq: 440.0 - SinOsc.ar: frequency: AudioControl.ar[0:freq] phase: 0.0 - LagControl.kr: amp: 0.1 gate: 1.0 lags[0]: 0.5 lags[1]: 0.0 - BinaryOpUGen(MULTIPLICATION).ar/0: left: SinOsc.ar[0] right: LagControl.kr[0:amp] - EnvGen.kr: gate: LagControl.kr[1:gate] level_scale: 1.0 level_bias: 0.0 time_scale: 1.0 done_action: 2.0 envelope[0]: 0.0 envelope[1]: 3.0 envelope[2]: 2.0 envelope[3]: -99.0 envelope[4]: 1.0 envelope[5]: 0.01 envelope[6]: 5.0 envelope[7]: -4.0 envelope[8]: 0.5 envelope[9]: 0.3 envelope[10]: 5.0 envelope[11]: -4.0 envelope[12]: 0.0 envelope[13]: 1.0 envelope[14]: 5.0 envelope[15]: -4.0 - BinaryOpUGen(MULTIPLICATION).ar/1: left: BinaryOpUGen(MULTIPLICATION).ar/0[0] right: EnvGen.kr[0] - Out.ar: bus: 0.0 source[0]: BinaryOpUGen(MULTIPLICATION).ar/1[0] source[1]: BinaryOpUGen(MULTIPLICATION).ar/1[0]
-
ugen(*, ar: bool =
False
, kr: bool =False
, ir: bool =False
, dr: bool =False
, new: bool =False
, has_done_flag: bool =False
, is_input: bool =False
, is_multichannel: bool =False
, is_output: bool =False
, is_pure: bool =False
, is_width_first: bool =False
, channel_count: int =1
, fixed_channel_count: bool =False
, signal_range: int | None =None
) Callable[[type[UGen]], type[UGen]] ¶ Decorate a UGen class.
Akin to dataclasses.dataclass.
Collects parameter descriptors and generates initializer and rate class methods.